765 research outputs found

    Towards trainable synthesis for optimized circuit deployment on FPGA

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    Field Programmable Gate Arrays (FPGAs) utilize multiple programmable elements and non-programmable blocks. After synthesizing an input Hardware Design Language (HDL) design into a circuit, optimizations are used to discover a satisfactory deployment on a target FPGA. HDLs' compound operations, such as addition, can be implemented in various ways and thus, multiple but functionally equivalent circuits can be synthesized. To leverage this, we propose a methodology that first enables configurable synthesis of compound operations. Second, it trains the system using a set of HDL files and architectures to optimize target performance objectives, such as critical path length and power. We prototyped our technique in the open source Verilog-To-Routing (VTR) tool. We subsequently produced two configuration files targeting different deployment objectives; experimental results with the VTR Verilog benchmarks revealed significant improvements

    The effectiveness of brute force attacks on RC4

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    Insights into WebAssembly: Compilation performance and shared code caching in node.js

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    Alongside JavaScript, V8 and Node.js have become essential components of contemporary web and cloud applications. With the addition of WebAssembly to the web, developers finally have a fast platform for performance-critical code. However, this addition also introduces new challenges to client and server applications. New application architectures, such as serverless computing, require instantaneous performance without long startup times. In this paper, we investigate the performance of WebAssembly compilation in V8 and Node.js, and present the design and implementation of a multi-process shared code cache for Node.js applications. We demonstrate how such a cache can significantly increase application performance, and reduce application startup time, CPU usage, and memory footprint

    Node.js scalability investigation in the cloud

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    Node.js has gained popularity in cloud development due to its asynchronous, non-blocking and event-driven nature. However, scalability issues can limit the number of concurrent requests while achieving an acceptable level of performance. To the best of our knowledge, no cloud-based benchmarks or metrics focusing on Node.js scalability exist. This paper presents the design and implementation of Ibenchjs, a scalability-oriented benchmarking framework, and a set of sample test applications. We deploy Ibenchjs in a local and isolated cloud to collect and report scalability-related measurements and issues of Node.js as well as performance bottlenecks. Our findings include: 1) the scaling performance of the tested Node.js test applications was sub-linear; 2) no improvements were measured when more CPUs were added without modifying the number of Node.js instances; and 3) leveraging cloud scaling solutions significantly outperformed Node.js-module-based scaling

    The weakest link: Revealing and modeling the architectural patterns of microservice applications

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    Cloud microservice applications comprise interconnected services packed into containers. Such applications generate complex communication patterns among their microservices. Studying such patterns can support assuring various quality attributes, such as autoscaling for satisfying performance, availability and scalability, or targeted penetration testing for satisfying security and correctness. We study the structure of containerized microservice applications via providing the methodology and the results of a structural graphbased analysis of 103 Docker Compose deployment files from opensourced Github repositories. Our findings indicate the dominance of a power-law distribution of microservice interconnections. Further analysis highlights the suitability of the Barabási-Albert model for generating large random graphs that model the architecture of real microservice applications. The exhibited structures and their usage for engineering microservice applications are discussed

    Sequential intravascular ultrasound of the mechanisms of rotational atherectomy and adjunct balloon angioplasty

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    AbstractObjectives. The purpose of this study was to use sequential intravascular ultrasound imaging before intervention, after rotational atherectomy and after adjunct balloon angioplasty to characterize the mechanisms of lumen enlargement after each.Background. Rotational atherectomy uses a high speed, rotating, diamond-tipped elliptic burr to abrade atherosclerotic plaque to increase lumen size. In vitro studies have shown that high speed rotational atherectomy selectively abrades hard, especially calcified, plaque elements. However, rotational atherectomy procedures usually require adjunct balloon angioplasty.Methods. Forty-eight lesions in 46 patients were treated with rotational atherectomy followed by adjunct balloon angioplasty in 44. Quantitative coronary arteriographic and intravascular ultrasound measurements of the target lesion were made before intervention, after rotational atherectomy and after balloon angioplasty.Results. Before intervention, target lesion external elastic membrane area measured 17.3 ± 5.9 mm2, lumen area measured 1.8 ± 0.9 mm2and plaque plus media area measured 15.7 ± 4.1 mm2. After rotational atherectomy, lumen area increased, plaque plus media area decreased, arc of target lesion calcium decreased and 26% of the target lesions had dissection planes After adjunct balloon angioplasty, external elastic membrane area increased, lumen area increased, plaque plus media area did not change and 77% of the target lesions had dissection planes. Arterial expansion was seen in 80% of lesions. The pattern of dissection plane location, which was predominantly within calcified plaque after rotational atherectomy, became predominantly adjacent to calcified plaque after adjunct balloon angioplasty (p = 0.008).Conclusions. Sequential intravascular ultrasound imaging shows that high speed rotational atherectomy causes lumen enlargement by selective ablation of hard, especially calcific, atherosclerotic plaque with little tissue disruption and rare arterial expansion. Adjunct balloon angioplasty further increased lumen area by a combination of arterial dissection and arterial expansion, especially of compliant, noncalcified plaque elements

    A comparison of verilog synthesis frontends

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    A crucial consideration in choosing a frontend synthesis tool is the quality of the synthesised result. This kind of benchmarking is critical to choosing a fit-for-purpose tool. However, to the best of the authors’ knowledge, the only comparison of Odin II, the front-end of Verilog-to-Routing, and another synthesis tool was focused primarily on Odin II and Yosys’ performance with respect to commercial counterparts in the Xilinx ISE tool. Further, such an evaluation is to improve confidence in research findings utilising these tools. The quality of results for a poorly optimised research tool may not reflect the performance of real-world applications, adding uncertainty to any findings and requiring extra work from the researcher to obtain valid results. We compare Odin II and Yosys targeting the Xilinx Artix-7 architecture provided by SymbiFlow
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